Tasks:
- * Coordinate architecture, RTL, verification, and physical design teams
- * Develop schedules, milestones, and resource plans
- * Drive cross functional issue resolution
- * Ensure design and verification methodology compliance
- * Identify and mitigate technical and schedule risks
- * Improve project workflows and communication
- * Manage ASIC/SoC front-end design lifecycle
- * Monitor project progress and delivery targets
- * Monitor verification coverage and bug resolution
Perks/Benefits:
Skills/Tech stack required:
[ASIC design] [Bug tracking] [Chip design flow] [Design flow] [Design verification] [Digital chip design] [Digital chip design flow] [English] [Mandarin] [Project Scheduling] [Resource Planning] [Risk Management] [RTL design] [Simulation] [SoC Design] [SystemVerilog] [Verification methodologies] [Verilog] [Version control]
Educational requirements:
N/A
Role(s):
[ASIC Project Manager] [Manager] [Project Manager] [SOC Project Manager] [Technical Project Manager]