Tasks:
- * Achieve timing closure
- * Automate FPGA workflows
- * Bring up network switch platforms
- * Create simulation testbenches
- * Debug FPGA hardware
- * Develop and verify RTL
- * Implement FPGA synthesis and place-and-route flows
- * Integrate FPGA systems with hardware and software
- * Review RTL and board schematics
Perks/Benefits:
- + Dental insurance
- + Income protection benefits
- + Medical insurance
- + Tax-savings benefits
- + Vision insurance
- + Wellbeing benefits
Skills/Tech stack required:
[AXI] [AXI-Stream] [Bus interfaces] [Control path] [Control path design] [Data Path] [EDA Tool] [EDA tool automation] [Ethernet data] [Ethernet data path] [FPGA design] [FPGA resource management] [I2C] [Logic Analyzers] [MDIO] [On-chip bus interfaces] [Oscilloscopes] [PCIe] [Python] [Resource Management] [RTL Verification] [Shell Scripting] [SPI] [SystemVerilog] [TCL] [Timing closure] [Tool Automation] [Verilog]
Educational requirements:
N/A
Role(s):
[Design Engineer] [Engineer] [FPGA Design Engineer] [RTL Design Engineer]